| Spotlight
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Monitor
and Control Batch Simulations with ModelSim's new Job
Spy™ Functionality
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| JobSpy™ allows a user to interact with running batch jobs. It is possible to gain visibility into the job by making a number of debug commands available from a process external to the running simulator. This external process can send and receive information about the running jobs. |
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Register
today to
receive an appnote and supporting files to use JobSpy™ with
your load sharing software or standalone.
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Download
Latest Release ModelSim 5.7c
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| Technical
Resources
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| Standards
Corner
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Users of ModelSim SE know the user interface offers the Tcl/Tk scripting environment that is an open standard used by many other software applications. Because of the application independent nature of the language, you will find a volume of resources available to you if you wish to customize and tune ModelSim to your particular verification needs. But where do you look?
To get you started with ModelSim customization, we offer a
Tcl/Tk resource page.
For the expert Tcl/Tk user, you may also want to consult ActiveState
for additional information. ActiveState offers a Tcl/Tk debugger and other support services that could make your ModelSim customization activities easier.
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| Dennis
Brophy, Director of Strategic Business Development |
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We have built ModelSim to automatically connect to the debugger if you have it installed. You simply have to select the debugger menu item in the ModelSim user interface.
It is the adoption of open standards, like Tcl/Tk, that makes it easy for you to have ModelSim fit seamlessly into your design environment.
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World
Wide Functional
Verification Seminar Series [more...]
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| EDA
Tech Forum |
| March
24; Princeton, NJ |
| March
27; Waltham, MA |
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FPGA Entire Desgin Flow
Training
3 day courses offered by Education Services!
Gain experience in simulating VHDL or Verilog models with ModelSim, synthesizing designs with Precision Synthesis and implementing them using the latest technologies of Altera Quartus® II or Xilinx ISE Alliance place and route tools.
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Xilinx Front-to-Back Design Flow with Precision RTL
April 15, San Jose |
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Altera Front-to-Back Design Flow with Precision RTL
June 10, San Jose |
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Schedule private training for your customers! Call for details. 800.345.2308
Mentor Graphics Education Services
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