 |
|
Model.com
| Register
| Latest Release
| Contact Us | Feedback |
| Your
Resource for Design Tools |
February
26, 2004 |
|
|
Register
now if would you like to continue to receive this valuable
monthly newsletter from Model Technology™. We will continue to send
you the latest technical resources, release information, upcoming
events and all other exciting news from Model Technology. We
would appreciate any feedback
you have regarding this newsletter.
|
| Spotlight
|
ModelSim® @ The Design Verification
Conference
March 1-3, 2004 San Jose Doubletree Hotel, Booth # 702
ModelSim will showcase its latest release, 5.8, which delivers a complete verification and debugging environment with native support for
VHDL, Verilog, and SystemC. ModelSim is the only simulator on the market today that delivers support for all major
standards-Verilog 2001, SystemVerilog, PSL, and SystemC.
Stop by our booth # 702 and enter to win a signed copy of Ben Cohen's book 'Using
PSL/Sugar with Verilog and VHDL. Guide to Property Specifications Language for Assertion-based Verification'.
For more information and to register click
here.
|
Share your success with ModelSim and
win!
Contact us with the details of how ModelSim was pivotal in getting your project done and if the success story gets published on our
website, you will receive a portable
Audiovox DVD/CD/MP3 Player.
|
|
|
|
|
| Release
Information
|
|
ModelSim 5.8b
|
|
For the latest formal verification
release information click
here.
|
|
5.8 Technical Notes
|
|
|
| Partner
News
|
|
AccelArray,TM Fujitsu's new structured array technology
Fujitsu is one of the leading semiconductor vendors offering structured array technology, which significantly reduces
development and masks' costs compared to cell-based ASIC's. Fujitsu’s
AccelArray™ is an innovative technology and design approach that leverages the company’s ASIC design experience, system-level expertise and commitment to offer unprecedented performance with short time to market.
[more...]
|
| Standards
Corner
|
| Interest in Accellera's Property Specification Language (PSL) is growing. Thanks to the Design & Verification Conference (DVCon) and Mentor Graphics' sponsorship, a unique opportunity to learn more about using PSL in verification is available at no charge for full conference attendees and for a minimal charge for exhibit-only attendees. This tutorial is being presented by Ben Cohen, author of Using PSL for Formal and Dynamic Verification. For conference and tutorial registration, please
visit the DVCon site.
For more information on PSL
visit www.accellera.com. For
information on Ben's
book view, Using PSL/Sugar for Formal and Dynamic Verification.
|
|
 |
| Stephen
Bailey, Technical Marketing Engineer |
|
|
|
We
respect your privacy and work hard to ensure any
information sent to you is relevant to your needs. With
this in mind, we have implemented a customer registration
process so you can determine the information you would
like to receive from us regarding ModelSim. To register or to unsubscribe from future
broadcasts, please proceed to ModelSim
Informant. Our privacy
policy is also available.
|
|
|
|
|
|
Design & Verification
Conference
San Jose, CA
March 1-3, 2004
ModelSim User Conferences -
Europe
Letchworth,
UK
March 3, 2004
Frankfurt, Germany
March 4, 2004
EDA Tech Forum
Technical Sessions and worldwide locations. Register
today!
SNUG
San Jose, CA
March 15-17, 2004
UK & Benelux Designer Forums -
Europe
Join Mentor Graphics for a day in EDA design technology with presentations and practical hands-on workshops.
Cambridge, England
March 17, 2004
Camberley,
England
May 5, 2004
ModelSim Training
HDL Simulation Using ModelSim
Marlborough,
MA March 9, 2004
ModelSim Advanced Debugging
Marlborough,
MA March 10, 2004
Comprehensive VHDL
Dallas,
TX
March 15, 2004
|
|
|
|
|
|
|
