| Spotlight
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ModelSim 5.7 Delivers Productivity Boost!
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| ModelSim
5.7 offers a number of new usability
and debug features. The leading mixed-language simulator is now
even faster for Verilog, VHDL and mixed-language designs. |
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| Technical
Resources
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| Standards
Corner
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As a user of ModelSim, you recognize it is founded on well-known IEEE standards like VHDL and Verilog®. Standards form the foundation on which progress and commerce rests, which is why Model Technology is dedicated to offer quick support for these evolving standards. Non-profit organizations, like Accellera serve to rapidly develop standards in an industrial, market-driven setting and feed their standards into the traditional IEEE processes. That is why we are also active in
Accellera. My name is Dennis Brophy and this year I serve as the chairman of
Accellera. In the months ahead, I will share with you more information
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| Dennis
Brophy, Director of Strategic Business Development |
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on developments within Accellera and other standards groups that will have an influence on ModelSim’s evolution. Today, I invite you to visit
Accellera for more information on the work of the technical teams and I extend to you an invitation to our annual
Design & Verification Conference and Exhibition.
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We
respect your privacy and work hard to ensure any
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| Design
& Verification Conference - San Jose,
CA |
| February 24-26,
2003 |
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| Technical
Papers presented by Model Technology: |
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| Date: Tuesday, Feb 25 Time: 8:30 am |
| HDL and C/C
++ Design Productivity |
| presented
by Allan Zacharda |
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| Date:
Tuesday, Feb 25 Time: 1:30 pm |
| Mixed Sign-Off! What is it and how do I get it done? |
| presented by
Josef Derner |
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| Panels: |
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Dennis Brophy, Panelist
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| Methodology
Driving Language, or Vice Versa |
| Date: Monday, Feb 24 Time:
1:30 pm |
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| Verilog and
Assertions - Do they mix? |
| Date: Monday, Feb 24 Time:
2:30 pm |
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| EDS Fair - Tokyo,
Japan |
| January 30-31, 2003 |
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| DATE - Munich,
Germany |
| March 03-07, 2003 |
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