ModelSim Informant - August 2008

Join us for a day of Verification. Sessions covering everything from CDC, Verification Management, Processor Based Verification, Low Power, Testbench Automation, Formal Techniques and the Open Verification Methodology. Don't miss the chance find out how Mentor Graphics is changing the direction of Verification to keep you ahead of the game.

This web seminar will review the various aspects of current verification problems and how leading edge Verification techniques such as Assertion Based Verification, Constrained Random, Coverage Driven Verification and Testbench Automation can increase your performance and productivity. These techniques can be applied both incrementally to existing verification environments and in a proactive manner to build an infrastructure capable of taking full advantage of these powerful concepts.

Designing today's powerful products put stress on verification environments. ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity. Each of these languages offer specific debug needs and ModelSim has proven technology that continues to evolve. Features like debugging Verilog deltas, process debugging, tracing through source code, comparing results of waveform files, vcd stimulus. These are a few of the features that will be featured during this comprehensive technical debug seminar.

Mentor Graphics' inFact testbench automation solution is the first to use intelligent algorithms to synthesize meaningful testbench sequences while allowing the user to set verification goals prior to simulation and determine verification priorities.

How intelligent testbench automation tools can help you rapidly reach higher verification coverage
How inFact's capabilities allow the creation of scalable, re-usable verification components
How intelligent testbench components fit into your overall verification architecture
How to construct an inFact intelligent testbench using step-by-step, hands-on exercises with a simple example

Learn, Share and Network with hundreds of your peers at User2User 2008, the Mentor Graphics International User Conference held at the Santa Clara Marriott.

Getting Real with OVM
Tuesday, November 4th, 2008 | 1:00pm - 5:00pm
Tom Fitzpatrick, Verification Technologist, Mentor Graphics

This workshop will present a full technical introduction to the Open Verification Methodology including usability and debug enhancements in Questa®. It then looks ahead to map out its future development direction. The scope and content is therefore suitable for both new users to the OVM and for those who have already had some exposure.

Early registration allows you to sign-up for free Product Training Classes, class sizes are limited. For more information.

August 21, 2008		model.com \| latest release \| contact us \| verification horizons

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Standards Corner OVM Advisory Group Formed Earlier this year, the Open Verification Methodology (OVM) Advisory Group (OAG) was formed from distinguished users and ecosystem suppliers to help develop new features and capabilities for the OVM. Founding members of the OAG include ARM; Cisco Systems, Inc.; Denali Software, Inc.; Freescale Semiconductor, Inc.; IBM Corp.; Infineon Technologies; Nokia Corp; STMicroelectronics NV and Xilinx, Inc. Input from the user community and members of the OAG, which first met in February 2008, is reflected in the latest release of the OVM, version 1.1, which is now available for download from OVM World. This release includes enhancements to stimulus generation arising directly from user experiences. With more than 4,500 registered users and hundreds of industry projects using the OVM, the OAG already has a wealth of suggestions and proposals to consider for future releases. - Dennis Brophy Dennis Brophy is the Director of Strategic Business Development for the Design Verification and Technology Division at Mentor Graphics. Release & Resources ModelSim Designer 6.3f Download Latest Release Request Eval License Designer Demos Designer Datasheet ModelSim - 6.4 Download Latest Release Request Eval License ModelSim Datasheet ModelSim Comparison Chart Verification Methodology AVM Cookbook v3.0-update-4 is now available. New Success Story Evatronix IP Enhances Competitive Advantage with a Little Help from 0-In Formal Verification (.pdf) Technical Training ModelSim HDL Simulation ModelSim Advanced Topics SystemVerilog for Verification SystemVerilog Open Verification Methodology DO-254 Compliance Overview Additional Events EDA Tech Forum August 22nd - Bangalore, IN August 27th - Hsinchu, TW August 29th - Seoul, KR September 2nd - Shanghai, CH September 4th - Penang, MY September 5th - Tokyo, JP September 11th - Santa Clara, CA RTL Reuse: Solving the Puzzle August 27th - Chicago, IL August 28th - Madison, WI Do you... DO-254 September 9th - Hamburg, DE DO-254 Compliance: Pitfalls and Solutions September 15th - Hartford, CT ADMS - Mixed Signal SoC Design Workshop September 23rd - San Jose, CA Prototyping: Easing the Transition from ASIC to FPGA Design September 25th - San Jose, CA
		Informant Spotlight Innovation in Verification Seminar Join us for a day of Verification. Sessions covering everything from CDC, Verification Management, Processor Based Verification, Low Power, Testbench Automation, Formal Techniques and the Open Verification Methodology. Don't miss the chance find out how Mentor Graphics is changing the direction of Verification to keep you ahead of the game. Locations: August 26th - San Jose, CA September 9th - Austin, TX September 11th - Dallas, TX September 16th - Boston, MA September 18th - Ottawa, ON September 23rd - Hyderabad, IN September 25th - Bangalore, IN Web Seminars Introduction to Advanced Verification Techniques This web seminar will review the various aspects of current verification problems and how leading edge Verification techniques such as Assertion Based Verification, Constrained Random, Coverage Driven Verification and Testbench Automation can increase your performance and productivity. These techniques can be applied both incrementally to existing verification environments and in a proactive manner to build an infrastructure capable of taking full advantage of these powerful concepts. Tuesday, August 26th, 2008 11:30 AM \| Central Daylight Time Register for this web seminar Advanced Debugging with ModelSim Designing today's powerful products put stress on verification environments. ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity. Each of these languages offer specific debug needs and ModelSim has proven technology that continues to evolve. Features like debugging Verilog deltas, process debugging, tracing through source code, comparing results of waveform files, vcd stimulus. These are a few of the features that will be featured during this comprehensive technical debug seminar. Wednesday, September 3rd, 2008 11:30 AM \| Central Daylight Time Register for this web seminar ModelSim 6.4 Overview Web Seminar Tuesday, September 16th, 2008 9:00 AM \| GMT Daylight Time Questa 6.4 Overview Web Seminar Wednesday, September 17th, 2008 9:00 AM \| GMT Daylight Time Featured Workshop Intelligent Testbench Automation Workshop Mentor Graphics' inFact testbench automation solution is the first to use intelligent algorithms to synthesize meaningful testbench sequences while allowing the user to set verification goals prior to simulation and determine verification priorities. You Will Learn: How intelligent testbench automation tools can help you rapidly reach higher verification coverage How inFact's capabilities allow the creation of scalable, re-usable verification components How intelligent testbench components fit into your overall verification architecture How to construct an inFact intelligent testbench using step-by-step, hands-on exercises with a simple example Locations: September 10th - Dallas, TX September 23rd - Columbia, MD September 25th - Waltham, MA September 30th - San Jose, CA User2User 2008 November 4-6, 2008 Learn, Share and Network with hundreds of your peers at User2User 2008, the Mentor Graphics International User Conference held at the Santa Clara Marriott. Featured Technical Workshop at User2User Getting Real with OVM Tuesday, November 4th, 2008 \| 1:00pm - 5:00pm Tom Fitzpatrick, Verification Technologist, Mentor Graphics This workshop will present a full technical introduction to the Open Verification Methodology including usability and debug enhancements in Questa®. It then looks ahead to map out its future development direction. The scope and content is therefore suitable for both new users to the OVM and for those who have already had some exposure. Early registration allows you to sign-up for free Product Training Classes, class sizes are limited. For more information. Verification Newsletter Sign up for monthly Verification News updates Start your Verification Horizons quarterly subscription