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Informant Spotlight:
The Design Automation Conference 2008
Anaheim CA, June 9th - 13th

Innovation in Verification Luncheon
Tuesday, June 10th, 12:00 PM
The Verification landscape is rapidly changing and challenges keep coming. Come and find out how Mentor Graphics is changing the direction of verification to keep you ahead of the game.
Our special guest for this luncheon is Mr. Benedetto Vigna - the man behind the chip inside every Wii gaming console. You can win a Wii just by attending and entering our special drawing.
Experience for yourself the innovation in verification that Mentor Graphics delivers. It will be the most memorable 2 hours at DAC.
Seating will be limited. Reserve your spot now!
Featured DAC Workshops
Design and Verification of Low Power SoCs: An Application Oriented Approach Workshop
Sunday, June 8th | 2:00 PM - 5:00 PM | 303C
More information.
Beyond Syntax and Semantics: Industry Experiences with OVL/SVA/PSL Workshop
Monday, June 9th | 1:00 PM - 5:15 PM | 207D
More information.
OSCI TLM-2.0 in 2008 – A Leap Forward for Transaction-Level Modeling Standards
Monday, June 9th | 2:00 PM - 5:00 PM | Ballroom E
You can find further info and registration.
Getting real with OVM, a True Open Source Verification Standard
Wednesday, June 11th | 12:15 PM - 2:00 PM | Room 201A
The Solutions Workshops will explore the evolution of OVM, the growing OVM ecosystem and the current status of the OVM libraries. The significant features of OVM will be detailed from a user's perspective and its application will be illustrated in the context of Questa. Finally based on experience of adopting and applying OVM a set of practical adoption tips will be outlined from an independent perspective by Doulos.
Learn more and register.
Featured DAC Presentations and Panel Discussion
Exhibit Floor Presentation
“What you should know about The Open Verification Methodology”
Monday, June 9th | 10:50AM to 11:30 AM | Exhibitor Forum, Hall D, Booth 2849
Booth and Suite Presentations
Join us in the Mentor booth, #2301, to hear the latest in Advanced Verification with sessions on Low Power Design, Clock-Domain Crossing, Formal Verification, Intelligent Testbench Automation, Verification Management, the Open Verification Methodology and more.
Learn more and register.
Panel Discussion
Real World Advantages of the OSCI TLM-2.0 Standard for Interoperability and IP Reuse
Monday, June 9th | 12:00 PM - 2:00 PM | Lunch provided in Ballroom E
Learn more about this panel discussion.
Online Events
Local Events
- EDA Tech Forum
- Introduction to Advanced Verification
- May 14th - Tempe, AZ
- May 15th - Addison, TX
- May 20th - Middleton, WI
- May 21st - Schaumburg, IL
- May 22nd - Edina, MN
- Intelligent Testbench Automation
- May 20th - Austin, TX
- May 22nd - San Jose, CA
- 7 Habits of Successful FPGA Design
- SystemVerilog for FPGA Designers
- Concept to FPGA to Board
- Integrated Electrical Solutions Forum
- Automotive Event Locations
- May 27th - Paris, France
- June 10th - San Paulo, Brazil
- November 12th - Seoul, Korea
- November 14th - Tokyo, Japan
- December 9th - Detroit, MI, USA
- Military/Aerospace Event Locations
- May 29th - Berlin, Germany
- June 12th - San Jose Campos, Brazil
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