February 12, 2008

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OSCI TLM-2 Draft 2 Open for Public Review

Open SystemC Initiative (OSCI) announced the second version of their transaction-level modeling (TLM) kit is available for public review. Transaction-level modeling continues to grow in importance for architectural exploration, performance analysis, building virtual platforms for software development, and functional verification. The TLM-2 Draft-2 standard from OSCI marks the culmination of several years of work and is a significant step to make interoperable transaction-level modeling a reality. The TLM-2 draft 2 kit incorporates feedback from the initial draft and provides a more synergistic and comprehensive solution to support untimed, loosely-timed and approximately-timed transaction-level modeling. The kit contains an introductory presentation, a detailed user's manual and examples to aid reviewers. The SystemC community is encouraged to review and provide feedback on this important draft via the TLM-2 discussion forum.

OSCI will also participate in DVCon where attendees can register for the tutorial on TLM-2, called "OSCI TLM-2 in 2008: A Leap Forward for Transaction-Level Modeling Standards. The tutorial is scheduled for Tuesday, February 19, 2008 from 1:30 pm to 5:00 pm. There is a fee to participate in the tutorial. The tutorial will present the details of the latest OSCI TLM-2 standard. TLM-2 explicitly addresses the interoperability of memory-mapped bus models at the transaction level, and provides a foundation and framework for the transaction-level modeling of other protocols. Click here for more information on and to register for the tutorial.

- Dennis Brophy

Dennis Brophy is the Director of Strategic Business Development for the Design Verification and Test division at Mentor Graphics.

Release & Resources

ModelSim Designer 6.3a

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Join experts from both Mentor Graphics and Cadence to learn more about the OVM. The OVM brings together the combined verification knowledge and experience to provide an approach to building verification IP and testbenches that is easy to adopt, yet powerful enough to meet the most demanding requirements. This seminar will illustrate all aspects of the OVM.

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Industry Events

DVCon - Feb. 19th & 20th - San Jose, CA

Learn more and register for DVCon 2008.

EDA Tech Forum

Introduction to PCIe Workshop

This ½ day hands-on workshop is designed to help engineers become familiar with the new Virtex-5 PCI Express Block from Xilinx with a Simulating with the PCI Express Endpoint Block ModelSim lab.

Integrated Electrical Solutions Forum

Learn more and be notified when registration opens.

U2U 2008 - November 4-6, Santa Clara, CA. Submit a paper, win a prize!

Each year, Mentor hosts a highly interactive user conference in which designers and engineers exchange their best practices, experiences, challenges, and tricks with colleagues from around the world. But it doesn't happen without you!

The Call for Papers is now open. If selected to present paper, you are automatically entered to win the "Best Paper" award in your track and a prize of $1000 USD.

Learn more about our 'Call for Papers'.

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