ModelSim SE
ModelSim SE (Special Edition) is our UNIX, Linux, and Windows-based simulation and debug environment, combining high performance with the most powerful and intuitive GUI in the industry.
What's new in ModelSim SE 6.5?
- Improved FSM debug options including control of basic information, transition table and warning messages. Added support of FSM Multi-state transitions coverage (i.e. coverage for all possible FSM state sequences).
- Improved debugging with hyperlinked navigation between objects and their declaration, and between visited source files.
- The dataflow window can now compute and display all paths from one net to another.
Enhanced code coverage data management with fine grain control of information in the source window.
- Toggle coverage has been enhanced to support SystemVerilog types: structures, packed unions, fixed-size multi-dimensional arrays and real.
- Some IEEE VHDL 2008 features are supported including source code encryption.
Added support of new VPI types, including packed arrays of struct nets and variables.
Features:
- Multi-language, high performance simulation engine
- Verilog, VHDL, SystemVerilog Design
- Code Coverage
- SystemVerilog for Design
- Integrated debug
- JobSpy Regression Monitor
- Mixed HDL simulation option
- SystemC Option
- TCL/tk
- Solaris and Linux 32 & 64-bit
- Windows 32-bit
Benefits:
- High performance HDL simulation solution for FPGA & ASIC design teams
- The best mixed-language environment and performance in the industry.
- Intuitive GUI for efficient interactive or post-simulation debug of RTL and gate-level designs
- Merging, ranking and reporting of code coverage for tracking verification progress
- Sign-off support for popular ASIC libraries
- All ModelSim products are 100% standards based. This means your investment is protected, risk is lowered, reuse is enabled, and productivity is enhanced.
- Award-winning technical support.
