Our standards-based, integrated solution provides the necessary functionality to address the most complex issues faced by your design teams.
The 6.4 series expands the advanced design and debug capabilities in ModelSim as well as delivering improved performance, capacity, support for new design and verification language features in SystemVerilog and numerous productivity and ease-of-use enhancements.
ModelSim is available on several platforms depending on your needs. View our product comparison document to discover which version is right for you.
ModelSim SE is our UNIX, Linux, and Windows-based simulation and debug environment,
combining high performance with the most powerful and intuitive GUI in the industry.
[Datasheet - pdf]
ModelSim LE is our Linux-based simulator with Dataflow Window and Waveform Compare included for better debug productivity.
ModelSim Designer is a Windows®-based design environment for FPGAs.
[Designer Datasheet - pdf]
ModelSim PE is our windows-based simulator, offers VHDL, Verilog, or mixed-language simulation.
[Datasheet - pdf]
ModelSim PE Student Edition is a free download of the industry leading ModelSim HDL simulator for use by students in their academic coursework.
No support of any kind is offered for the Student Edition.
Questa is the first single-kernel, standards-based verification platform that supports SystemVerilog, SystemC, and PSL. Questa was designed to support verification methodologies like testbench automation, coverage-driven verification, assertion-based verification, and transaction level modeling. Single-kernel simulation kernel that supports SystemVerilog, SystemC, PSL, VHDL, and Verilog Constrained-random stimulus generation automates test generation Assertion-based verification with PSL and SystemVerilog Increased predictability and productivity with coverage-driven verification High-level design with SystemVerilog and SystemC Powerful, intuitive GUI speeds analysis of advanced verification languages High-performance RTL and gate-level optimizations
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