ModelSim - Advanced Simulation and Debugging
Mentor Graphics was the first to combine single kernel simulator (SKS) technology with a unified debug environment for Verilog, VHDL, and SystemC. The combination of industry-leading, native SKS performance with the best integrated debug and analysis environment make ModelSim the simulator of choice for both ASIC and FPGA design. The best standards and platform support in the industry make it easy to adopt in the majority of process and tool flows.
With ModelSim DE, we now offer support for Xilinx SecureIP and Assertion-Based Verification with SystemVerilog and PSL support.
Find out about Assertion-Based Verification in the Verification Academy.
Learn more about ModelSim DE then view the archived web seminar - Introducing ModelSim DE.
The Verification Academy's Harry Foster will be presenting an Assertion-Based Verification Seminar on January 19th in Santa Clara, CA. This seminar will also include focused sessions on Advanced Debugging with Assertions and Effective Coverage using Assertions. Then, SystemVerilog Guru - Cliff Cummings from Sunburst Design will be delivering a SystemVerilog Assertions training. This will be one seminar that you'll want to register early for.